Logic Circuits Exam Dump

Q.1 If the crystal oscillator is operating at 15 MHz, the PCLK output of 8284 is
(A) 2.5 MHz. (B) 5 MHz.
(C) 7.5 MHz. (D) 10 MHz.
Ans: (A)

Q.2 In which T-state does the CPU sends the address to memory or I/O and the ALE signal
for demultiplexing
(A) T1. (B) T2.
(C) T3. (D) T4.
Ans, During the first clocking period in a bus cycle, which is called T1, the address of
the memory or I/O location is sent out and the control signals ALE, DT/R’ and IO/M’
are also output. Hence answer is (A).

Q.3 If a 1M×1 DRAM requires 4 ms for a refresh and has 256 rows to be refreshed, no
more than __________ of time must pass before another row is refreshed.
(A) 64 ms. (B) 4 ns.
(C) 0.5 ns. (D) 15.625 μs .
Ans Answer is (B)

Q.4 In a DMA write operation the data is transferred
(A) from I/O to memory. (B) from memory to I/O.
(C) from memory to memory. (D) from I/O to I/O.
Ans A DMA writes operation transfers data from an I/O device to memory. Hence
answer is (A).

Q.5 Which type of JMP instruction assembles if the distance is 0020 h bytes
(A) near. (B) far.
(C) short. (D) none of the above.
Ans The three byte near jump allows a branch or jump within ± 32K bytes. Hence
answer is (A).

Q.6 A certain SRAM has CS = 0 , WE = 0 and OE = 1. In which of the following
modes this SRAM is operating
(A) Read (B) Write
(C) Stand by (D) None of the above
Ans For CS’=WE’=0, write operation. Hence answer is (B).

Q.7 Which of the following is true with respect to EEPROM?
(A) contents can be erased byte wise only.
(B) contents of full memory can be erased together.
(C) contents can be erased using ultra violet rays
(D) contents can not be erased
Ans Answer is (C).

Q.8 Pseudo instructions are basically
(A) false instructions.
(B) instructions that are ignored by the microprocessor.
(C) assembler directives.
(D) instructions that are treated like comments.
Ans Pseudo-instructions are commands to the assembler. All pseudo-operations start
with a period. Pseudo-instructions are composed of a pseudo-operation which may be
followed by one or more expressions. Hence answer is (C).
Q.9 Number of the times the instruction sequence below will loop before coming out of
loop is
MOV AL, 00h
(A) 00 (B) 01
(C) 255 (D) 256
Ans Answer is (D)
Q.10 What will be the contents of register AL after the following has been executed
(A) 0A and carry flag is set (B) 0A and carry flag is reset
(C) 6A and carry flag is set (D) 6A and carry flag is reset
Ans, Result is 1,0A. Hence answer is (A).
Q.11 Direction flag is used with
(A) String instructions. (B) Stack instructions.
(C) Arithmetic instructions. (D) Branch instructions.
Ans The direction flag is used only with the string instructions. Hence answer is (A).
Q.12 Ready pin of a microprocessor is used
(A) to indicate that the microprocessor is ready to receive inputs.
(B) to indicate that the microprocessor is ready to receive outputs.
(C) to introduce wait states.
(D) to provide direct memory access.
Ans This input is controlled to insert wait states into the timing of the microprocessor.
Hence answer is (C).
Q.13 These are two ways in which a microprocessor can come out of Halt state.
(A) When hold line is a logical 1.
(B) When interrupt occurs and the interrupt system has been enabled.
(C) When both (A) and (B) are true.
(D) When either (A) or (B) are true.
Ans Answer is (A)
Q.14 In the instruction FADD, F stands for
(A) Far. (B) Floppy.
(C) Floating. (D) File.
Ans Adds two floating point numbers. Hence answer is (C).

Q.15 SD RAM refers to
(A) Synchronous DRAM (B) Static DRAM
(C) Semi DRAM (D) Second DRAM
Ans, Answer is (A)

Q.16 In case of DVD, the speed is referred in terms of n X (for example 32 X). Here, X
refers to
(A) 150 KB/s (B) 300 KB/s
(C) 1.38 MB/s (D) 2.4 MB/s
Ans Answer is (C).

Q.17 Itanium processor of Intel is a
(A) 32 bit microprocessor. (B) 64 bit microprocessor.
(C) 128 bit microprocessor. (D) 256 bit microprocessor.
Ans The Itanium is a 64-bit architecture microprocessor. Hence answer is (B).